Today's leading-edge system-on-chip (SoC) designs typically have multiple clock domains and, in many cases, multiple internally generated clocks. In test mode, those clocks may be combined into one, ...

Here at Hackaday we can never get enough of odd clocks, and we’re delighted to see [Dan O’Shea]’s creation called the Wifi-Telnet-FPGA-NTSC Drunk Wall Clock. That mouthful is an accurate description ...