The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
RISC-V, an open instruction set architecture (ISA), is reshaping the global computing landscape. Unlike proprietary ISAs such as x86, widely used by Intel and AMD, or ARM, which dominates mobile and ...
The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...
SiFive, a RISC-V processor design firm, unveiled two new chip designs aimed at bringing a high-performance computing solution to various industries. The announcement of the SiFive Performance P870 and ...
The Power architecture doesn’t get the attention it deserves. With Power5 servers finally shipping, even non-Big Blue shops should take look again If all things were equal and IBM made its systems as ...
Intel has announced a billion-dollar development fund to support its nascent foundry ecosystem. IFS (Intel Foundry Services) wants to partner with a range of other firms to develop platform building ...
ECARX launched its RISC-V-based EXP01 processor and outlined its automotive-grade MCU roadmap at the RISC-V Summit Europe 2025. ECARX Holdings Inc., a global mobility tech provider, introduced its ...
For some time, application-specific instruction processors (ASIPs) have been developed for specialized applications. These have required multi-disciplinary teams with sufficient expertise to develop ...
A trio of RISC-V-based microcontroller platforms developed by Synopsys are aimed at MCUs, 32-bit real-time apps, and 64-bit application processors. Why Synopsys’ entry into the RISC-V field is ...
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