This post sponsored by Texas Instruments. The Texas Instruments MSP430FR573x family of ultra-low-power microcontrollers consists of multiple devices that feature embedded FRAM nonvolatile memory, ...
Open Source software has been around for decades. Over these decades, Open Source software has been the driving force behind most of the Internet, and all of the top-500 supercomputers. The product of ...
The ESP32-P4 is the new hotness on the microcontroller market. With RISC-V architecture and two cores running 400 MHz, to ...
Infineon is increasingly focusing on the open processor instruction set architecture RISC-V. Over the next few years, the manufacturer intends to launch a complete microcontroller portfolio with ...
Open source software rightly gets a lot of attention; open source hardware has its part to play too. One development drawing increasing attention in both technical and executive circles is RISC-V, ...
Infineon Technologies is to show a virtual prototype of a microcontroller based on the RISC-V open instruction set architecture for automotive applications next week. This will sit in the Aurix family ...
San Jose, Calif. — Expanding its efforts in the automotive market, Renesas Technology Corp. is rolling out a 32-bit RISC microcontroller that integrates the company's new embedded flash memory ...
1. SiFive's Freedom E310 32-bit microcontroller is the first commercially available RISC-V chip. A RISC-V chip is now available in the form of SiFive's Freedom E310 (Fig. 1). The Freedom E310 is a ...
Broadening customer access to one of the industry’s most popular 32-bit microcontroller (MCU) architectures, Freescale Semiconductor (NYSE:FSL) (NYSE:FSL.B) has initiated a ColdFire® licensing ...
Major automakers are accelerating commercialization of software-defined vehicle platforms that integrate software downloads, ...
YouTuber bitluni likes building strange things. Head over to his channel and you can watch footage of him constructing a multi-colored LED wall made of ping pong balls and a DIY sonar scanner.